Sr. Digital Design Verification Engineer

job description:

Invariant Corporation is seeking a talented and motivated Digital Design and Verification Engineer with more than 10 years’ experience. The successful candidate will:

• Write test plans, test benches, and assertions to verify complex digital designs meet requirements

• Provide guidance on RTL-coding best practices and test bench designs

• Lead RTL code reviews to ensure adherence to digital design best practices

• Architect, implement, and verify digital designs of custom IP targeting FPGAs/ASICs

• Structure high-level architectural documentation and develop detailed verification approaches within a team environment using tools such as test benches, SystemVerilog, UVM, and/or OSVVM

• Ensure verification plans will meet code-coverage and functional-coverage goals

• Provide analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products

• Plan research projects to develop concepts for future custom IP designs to meet projected requirements

• Conducts trade studies and literature research to support future custom IP designs

• Maintains detailed requirements and specifications for various electronic products

• Identify, track and status technical performance on IP development to measure progress and ensure compliance with requirements

• Provides in-depth engineering support throughout the lifecycle of IP products

• Provide support at customer facilities

WHY WE’RE DIFFERENT:

Our philosophy that a company could be both dedicated to fostering a pro-employee work atmosphere and maintain an unwavering commitment to excellence by providing the highest quality of achievement in service to their customer.

REQUIREMENTS:

Candidate must have a minimum of a bachelor’s degree in engineering, or related field with a minimum of ten (10) years of relevant experience is required.

• Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry

• Ten (10) or more years of educational and/or work experience in digital design and verification for FPGAs and/or ASICs

• Three (3) or more years of work experience using Verilog and/or SystemVerilog

PREFERRED QUALIFICATIONS INCLUDE FAMILIARITY WITH SOME OR ALL THE FOLLOWING:

• Work experience with verification tools such as Questa Prime, OneSpin 360-DV Verify, Real Intent RDC/CDC

• Work experience performing RTL synthesis for FPGAs and/or ASICs

• Work experience simulating digital designs using hardware verification languages: SystemVerilog and SystemVerilog Assertions

• Work experience with Universal Verification Methodology (UVM) or OSVVM, start-to-finish

• Experience using scripting languages: Make, Perl, Python, shell scripts, etc.

• Experience using Revision Control Systems: Subversion (SVN), CVS, Git

• Work experience writing requirements specification documents

• Work experience writing architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.

REQUIRES ABILITY TO:

• Obtain and maintain a Top-Secret security clearance or Secret Clearance with PR within 5 years

• Up to 10% travel may be required depending on project requirements

• Work well in a small, fast-paced and mission-driven environment with co-workers, management, and client

• Demonstrate innovation, quick learning, excellent communication skills and adaptive thinking

• Work independently with minimal supervision, and to make rational decisions, and to exercise good judgment is essential

WORK ENVIRONMENT:

• Office, Lab, and field environment.

NEXT STEPS:

If you are interested in employment opportunities with Invariant, please use the APPLY NOW button and attach your resume or send by fax to 256.881.1812. Be sure to include the title of the position in your email. We’d love to hear from you!